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08051C103JAT7A [KYOCERA AVX]

General Specifications; 一般特定网络阳离子
08051C103JAT7A
型号： 08051C103JAT7A
厂家： KYOCERA AVX    KYOCERA AVX
描述：

General Specifications
一般特定网络阳离子
文件： 总20页 (文件大小：339K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
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X7R Dielectric  
Capacitance Range  
PREFERRED SIZES ARE SHADED  
SIZE  
0201  
0402  
0603  
0805  
1206  
Soldering  
Reflow Only  
Reflow Only  
Reflow/Wave  
Reflow/Wave  
Reflow/Wave  
Packaging  
All Paper  
All Paper  
All Paper  
Paper/Embossed  
Paper/Embossed  
MM  
0.60 0.03  
1.00 0.10  
(0.040 0.004)  
1.60 0.15  
(0.063 0.006)  
2.01 0.20  
(0.079 0.008)  
3.20 0.20  
(0.126 0.008)  
(L) Length  
(in.) (0.024 0.001)  
MM  
(in.) (0.011 0.001)  
MM 0.15 0.05  
(in.) (0.006 0.002)  
0.30 0.03  
0.50 0.10  
0.81 0.15  
1.25 0.20  
1.60 0.20  
(W) Width  
(0.020 0.004)  
(0.032 0.006)  
(0.049 0.008)  
(0.063 0.008)  
0.25 0.15  
(0.010 0.006)  
0.35 0.15  
(0.014 0.006)  
0.50 0.25  
(0.020 0.010)  
0.50 0.25  
(0.020 0.010)  
(t) Terminal  
WVDC  
Cap  
(pF)  
10  
16  
6.3  
10  
16  
25  
50  
6.3  
10  
16  
25  
50  
100 200  
10  
E
16  
E
25  
50  
100 200  
10  
16  
25  
50  
100 200  
100  
120  
150  
180  
220  
270  
A
A
A
A
A
A
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
A
A
A
A
A
A
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
W
L
E
E
E
E
ꢀ
330  
390  
470  
A
A
A
A
A
A
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
T
ꢀ
560  
680  
820  
A
A
A
A
A
A
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
t
1000  
1200  
1500  
A
A
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
1800  
2200  
2700  
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
3300  
3900  
4700  
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
E
E
E
E
E
E
E
E
E
E
E
E
E
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
5600  
6800  
8200  
C
C
C
C
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
E
E
E
E
E
E
E
E
E
E
E
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
Cap.  
(µF)  
0.010  
C
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
E
J
J
E
J
J
E
J
J
E
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
0.012  
M
0.015  
M
0.018  
0.022  
0.027  
C
C
C
C
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
M
M
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
M
M
M
0.033  
0.039  
0.047  
C
C
C
C
G
G
G
G
G
G
G
G
G
G
G
G
G
G
J
J
J
J
J
J
J
J
J
J
J
J
M
M
M
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
M
M
M
0.056  
0.068  
0.082  
G
G
G
G
G
G
G
G
G
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
P
P
J
M
0.10  
0.12  
0.15  
G
G
G
G
G
G
G
J
J
J
J
J
J
J
J
J
J
M
J
J
J
J
J
J
J
J
J
J
J
J
M
0.18  
0.22  
0.27  
G
G
G
G
J
J
M
M
J
J
J
J
J
J
J
J
J
J
J
J
J
M
M
M
0.33  
0.47  
0.56  
M
N
N
M
M
J
J
M
M
Q
M
M
M
M
M
M
0.68  
0.82  
1.0  
N
N
N
M
M
M
M
M
M
Q
Q
Q
1.2  
1.5  
1.8  
P
P
P
2.2  
3.3  
4.7  
Q
10  
22  
47  
100  
WVDC  
10  
16  
6.3  
10  
16  
25  
50  
6.3  
10  
16  
25  
50  
100 200  
10  
16  
25  
50  
100 200  
10  
16  
25  
50  
100 200  
SIZE  
0201  
0402  
0603  
0805  
1206  
Letter  
Max.  
Thickness (0.013)  
A
0.33  
C
0.56  
(0.022)  
E
0.71  
(0.028)  
G
0.86  
(0.034)  
J
0.94  
(0.037)  
K
1.02  
(0.040)  
M
1.27  
(0.050)  
N
P
1.52  
(0.060)  
Q
X
2.29  
(0.090)  
Y
Z
2.79  
(0.110)  
BB  
3.05  
(0.120)  
CC  
3.175  
(0.125)  
1.40  
(0.055)  
1.78  
(0.070)  
EMBOSSED  
2.54  
(0.100)  
PAPER  
Contact Factory for Multiples  
13  
X7R Dielectric  
Capacitance Range  
PREFERRED SIZES ARE SHADED  
SIZE  
Soldering  
Packaging  
1210  
1812  
1825  
2220  
2225  
Reflow/Wave  
Reflow Only  
Reflow Only  
Reflow Only  
Reflow Only  
Paper/Embossed  
All Embossed  
All Embossed  
All Embossed  
All Embossed  
MM  
(in.)  
3.20 0.20  
(0.126 0.008)  
4.50 0.30  
(0.177 0.012)  
4.50 0.30  
(0.177 0.012)  
5.7 0.40  
(0.224 0.016)  
5.72 0.25  
(0.225 0.010)  
(L) Length  
MM  
(in.)  
2.50 0.20  
(0.098 0.008)  
3.20 0.20  
(0.126 0.008)  
6.40 0.40  
(0.252 0.016)  
5.0 0.40  
(0.197 0.016)  
6.35 0.25  
(0.250 0.010)  
(W) Width  
MM  
(in.)  
0.50 0.25  
(0.020 0.010)  
0.61 0.36  
(0.024 0.014)  
0.61 0.36  
(0.024 0.014)  
0.64 0.39  
(0.025 0.015)  
0.64 0.39  
(0.025 0.015)  
(t) Terminal  
WVDC  
10  
16  
25  
50  
100  
16  
25  
50  
100  
50  
100  
50  
100  
200  
50  
100  
Cap  
(pF)  
100  
120  
150  
180  
220  
270  
W
L
ꢀ
330  
390  
470  
T
ꢀ
560  
680  
820  
t
1000  
1200  
1500  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
1800  
2200  
2700  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
3300  
3900  
4700  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
5600  
6800  
8200  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
Cap.  
(µF)  
0.010  
0.012  
0.015  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
M
M
M
M
M
M
X
X
X
X
X
X
X
X
X
M
M
M
M
M
M
0.018  
0.022  
0.027  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
M
M
M
M
M
M
X
X
X
X
X
X
X
X
X
M
M
M
M
M
M
0.033  
0.039  
0.047  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
M
M
M
M
M
M
X
X
X
X
X
X
X
X
X
M
M
M
M
M
M
0.056  
0.068  
0.082  
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
M
M
M
M
M
M
X
X
X
X
X
X
X
X
X
M
M
M
M
M
M
0.10  
0.12  
0.15  
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
M
M
M
M
M
M
X
X
X
X
X
X
X
X
X
M
M
M
M
M
M
M
M
0.18  
0.22  
0.27  
J
J
J
J
J
J
J
J
J
J
J
J
P
P
Z
K
K
K
K
M
M
M
M
M
M
X
X
X
X
X
X
X
X
M
M
M
M
M
M
K
M
0.33  
0.47  
0.56  
J
J
J
J
M
Z
Z
Z
K
M
M
M
M
M
M
M
X
X
X
X
X
X
M
M
M
M
M
M
M
M
M
K
P
M
M
M
M
Q
0.68  
0.82  
1.0  
M
M
N
M
M
N
P
P
P
Z
M
M
M
X
X
X
M
M
M
Q
Q
Q
X
X
X
X
M
M
M
M
M
M
X
Z
1.2  
1.5  
1.8  
N
N
N
N
N
P
M
M
M
X
M
M
M
P
P
2.2  
3.3  
4.7  
X
Z
M
Q
Z
10  
Z
22  
47  
100  
WVDC  
10  
16  
25  
50  
100  
16  
25  
50  
100  
50  
100  
50  
100  
200  
50  
100  
SIZE  
1210  
1812  
1825  
2220  
2225  
Letter  
Max.  
Thickness (0.013)  
A
0.33  
C
0.56  
(0.022)  
E
0.71  
(0.028)  
G
0.86  
(0.034)  
J
0.94  
(0.037)  
K
1.02  
(0.040)  
M
1.27  
(0.050)  
N
1.40  
(0.055)  
P
1.52  
(0.060)  
Q
1.78  
(0.070)  
X
2.29  
(0.090)  
Y
2.54  
(0.100)  
Z
2.79  
(0.110)  
BB  
3.05  
(0.120)  
CC  
3.175  
(0.125)  
PAPER  
EMBOSSED  
Contact Factory for Multiples  
14  
High Voltage Chips  
For 500V to 5000V Applications  
High value, low leakage and small size are difficult parameters to obtain  
in capacitors for high voltage systems. AVX special high voltage MLC  
chips capacitors meet these performance characteristics and are  
designed for applications such as snubbers in high frequency power  
converters, resonators in SMPS, and high voltage coupling/DC blocking.  
These high voltage chip designs exhibit low ESRs at high frequencies.  
Larger physical sizes than normally encountered chips are used to  
make high voltage chips. These larger sizes require that special pre-  
cautions be taken in applying these chips in surface mount assem-  
blies. This is due to differences in the coefficient of thermal expansion  
(CTE) between the substrate materials and chip capacitors. Apply heat  
at less than 4°C per second during the preheat. Maximum preheat  
temperature must be within 50°C of the soldering temperature.  
The solder temperature should not exceed 230°C. Chips 1808 and  
larger to use reflow soldering only.  
Capacitors with X7R Dielectrics are not intended for AC line filtering  
applications.  
Contact plant for recommendations. Capacitors may require protective  
surface coating to prevent external arcing.  
PART NUMBER (see page 2 for complete information and options)  
1808  
A
A
271  
K
A
1
1A  
AVX  
Style  
1206  
1210  
1808  
1812  
1825  
2220  
2225  
3640  
Voltage  
7 = 500V  
C = 600V  
A = 1000V  
S = 1500V  
G = 2000V  
W = 2500V  
H = 3000V  
J = 4000V  
K = 5000V  
Temperature Capacitance Capacitance  
Failure  
Rate  
Termination  
1= Pd/Ag  
T = Plated Ni  
and Solder  
Packaging/Marking  
1A = 7" Reel  
Coefficient  
A = C0G  
C = X7R  
Code  
(2 significant digits  
+ no. of zeros)  
Examples:  
10 pF = 100  
100 pF = 101  
Tolerance  
C0G: J = 5ꢀ  
K = 10ꢀ  
M = 20ꢀ  
X7R: K = 10ꢀ  
M = 20ꢀ  
Unmarked  
A=Not  
3A = 13" Reel  
Unmarked  
9A = Bulk/Unmarked  
Applicable  
1,000 pF = 102  
22,000 pF = 223  
Z = +80ꢀ,  
-20ꢀ  
220,000 pF = 224  
1 µF = 105  
W
L
T
t
DIMENSIONS  
millimeters (inches)  
SIZE  
1206  
1210  
1808*  
4.57 0.25  
1812*  
1825*  
2220*  
2225*  
3640*  
(L) Length  
3.20 0.2  
3.20 0.2  
4.50 0.3  
4.50 0.3  
5.7 0.4  
5.72 0.25  
9.14 0.25  
(0.126 0.008) (0.126 0.008) (0.180 0.010) (0.177 0.012) (0.177 0.012) (0.224 0.016) (0.225 0.010) (0.360 0.010)  
1.60 0.2 2.50 0.2 2.03 0.25 3.20 0.2 6.40 0.3 5.0 0.4 6.35 0.25 10.2 0.25  
(0.063 0.008) (0.098 0.008) (0.080 0.010) (0.126 0.008) (0.252 0.012) (0.197 0.016) (0.250 0.010) (0.400 0.010)  
(W) Width  
(T) Thickness  
Max.  
1.52  
(0.060)  
1.70  
(0.067)  
2.03  
(0.080)  
2.54  
(0.100)  
2.54  
(0.100)  
3.3  
(0.130)  
2.54  
(0.100)  
2.54  
(0.100)  
(t) terminal  
min.  
max.  
0.25 (0.010)  
0.75 (0.030)  
0.25 (0.010)  
0.75 (0.030)  
0.25 (0.010)  
1.02 (0.040)  
0.25 (0.010)  
1.02 (0.040)  
0.25 (0.010)  
1.02 (0.040)  
0.25 (0.010)  
1.02 (0.040)  
0.25 (0.010)  
1.02 (0.040)  
0.76 (0.030)  
1.52 (0.060)  
*Reflow Soldering Only  
39  
High Voltage Chips  
For 500V to 5000V Applications  
C0G Dielectric  
PERFORMANCE CHARACTERISTICS  
Capacitance Range  
10 pF to 0.047 µF  
(25°C, 1.0 0.2 Vrms at 1kHz, for ≤ 1000 pF use 1 MHz)  
5ꢀ, 10ꢀ, 20ꢀ  
Capacitance Tolerances  
Dissipation Factor  
0.1ꢀ max. (+25°C, 1.0 0.2 Vrms, 1kHz, for ≤ 1000 pF use 1 MHz)  
-55°C to +125°C  
Operating Temperature Range  
Temperature Characteristic  
Voltage Ratings  
Insulation Resistance (+25°C, at 500 VDC)  
Insulation Resistance (+125°C, at 500 VDC)  
Dielectric Strength  
0
30 ppm/°C (0 VDC)  
500, 600, 1000, 1500, 2000, 2500, 3000, 4000 & 5000 VDC (+125°C)  
100K MΩ min. or 1000 MΩ - µF min., whichever is less  
10K MΩ min. or 100 MΩ - µF min., whichever is less  
500V, 150ꢀ rated voltage for 5 seconds at 50 mA max. current  
≥ 600V, 120ꢀ rated voltage for 5 seconds at 50 mA max. current  
HIGH VOLTAGE C0G CAPACITANCE VALUES  
VOLTAGE  
1206  
1210  
1808  
1812  
1825  
2220  
2225  
3640  
min.  
—
680 pF  
100 pF  
680 pF  
10 pF  
470 pF  
10 pF  
150 pF  
10 pF  
68 pF  
—
—
1500 pF  
100 pF  
1500 pF  
100 pF  
820 pF  
100 pF  
330 pF  
10 pF  
150 pF  
—
—
3300 pF  
100 pF  
2700 pF  
100 pF  
1500 pF  
10 pF  
470 pF  
10 pF  
270 pF  
10 pF  
150 pF  
10 pF  
100 pF  
10 pF  
39 pF  
—
—
5600 pF  
100 pF  
5600 pF  
100 pF  
2700 pF  
10 pF  
—
0.012 µF  
1000 pF  
0.012 µF  
100 pF  
6800 pF  
100 pF  
2700 pF  
100 pF  
1800 pF  
10 pF  
—
—
0.018 µF  
1000 pF  
0.015 µF  
1000 pF  
0.010 µF  
1000 pF  
3300 pF  
1000 pF  
2200 pF  
100 pF  
1200 pF  
10 pF  
—
500  
max.  
—
1000 pF  
0.012 µF  
1000 pF  
0.010 µF  
1000 pF  
2700 pF  
1000 pF  
2200 pF  
100 pF  
1000 pF  
10 pF  
—
1000 pF  
0.047 µF  
1000 pF  
0.018 µF  
100 pF  
8200 pF  
100 pF  
5600 pF  
100 pF  
3900 pF  
100 pF  
2200 pF  
100 pF  
1000 pF  
10 pF  
min.  
600  
max.  
min.  
1000  
max.  
min.  
1500  
max.  
1000 pF  
10 pF  
min.  
2000  
max.  
680 pF  
10 pF  
min.  
2500  
max.  
—
—
390 pF  
10 pF  
1000 pF  
10 pF  
min.  
—
—
3000  
max.  
—
—
330 pF  
10 pF  
680 pF  
10 pF  
680 pF  
10 pF  
820 pF  
10 pF  
min.  
—
—
4000  
max.  
—
—
100 pF  
—
220 pF  
—
220 pF  
—
330 pF  
—
min.  
—
—
5000  
max.  
—
—
—
—
—
—
—
680 pF  
X7R Dielectric  
PERFORMANCE CHARACTERISTICS  
Capacitance Range  
10 pF to 0.56 µF (25°C, 1.0 0.2 Vrms at 1kHz)  
Capacitance Tolerances  
Dissipation Factor  
Operating Temperature Range  
Temperature Characteristic  
Voltage Ratings  
Insulation Resistance (+25°C, at 500 VDC)  
Insulation Resistance (+125°C, at 500 VDC)  
Dielectric Strength  
10ꢀ% 20ꢀ% +80ꢀ, -20ꢀ  
2.5ꢀ max. (+25°C, 1.0 0.2 Vrms, 1kHz)  
-55°C to +125°C  
15ꢀ (0 VDC)  
500,600, 1000, 1500, 2000, 2500, 3000, 4000 & 5000 VDC (+125°C)  
100K MΩ min. or 1000 MΩ - µF min., whichever is less  
10K MΩ min. or 100 MΩ - µF min., whichever is less  
500V, 150ꢀ rated voltage for 5 seconds at 50 mA max. current  
≥ 600V, 120ꢀ rated voltage for 5 seconds at 50 mA max. current  
HIGH VOLTAGE X7R MAXIMUM CAPACITANCE VALUES  
VOLTAGE  
1206  
1210  
1808  
1812  
1825  
2220  
2225  
3640  
min.  
—
0.015 µF  
1000 pF  
0.015 µF  
1000 pF  
4700 pF  
100 pF  
1200 pF  
10 pF  
470 pF  
—
—
0.027 µF  
1000 pF  
0.027 µF  
1000 pF  
0.010 µF  
100 pF  
2700 pF  
100 pF  
1000 pF  
—
—
—
0.056 µF  
.01 µF  
0.068 µF  
1000 pF  
0.027 µF  
100 pF  
8200 pF  
100 pF  
4700 pF  
10 pF  
—
—
—
—
500  
max.  
—
—
—
.01 µF  
0.15 µF  
.01 µF  
0.068 µF  
1000 pF  
0.022 µF  
1000 pF  
0.010 µF  
1000 pF  
6800 pF  
1000 pF  
3300pF  
—
—
—
.01 µF  
min.  
.01 µF  
0.033 µF  
1000 pF  
0.015 µF  
100 pF  
3900 pF  
100 pF  
1800 pF  
10 pF  
1200 pF  
10 pF  
560 pF  
—
.01 µF  
0.15 µF  
1000 pF  
0.068 µF  
1000 pF  
0.018 µF  
100 pF  
8200 pF  
100 pF  
5600 pF  
100 pF  
2700 pF  
—
.01 µF  
0.22 µF  
.01 µF  
0.082 µF  
1000 pF  
0.027 µF  
1000 pF  
0.012 µF  
1000 pF  
8200 pF  
1000 pF  
4700 pF  
—
600  
max.  
0.56 µF  
.01 µF  
min.  
1000  
max.  
0.22 µF  
.01 µF  
min.  
1500  
max.  
0.068 µF  
1000 pF  
0.027 µF  
1000 pF  
0.022 µF  
1000 pF  
0.018 µF  
100 pF  
min.  
2000  
max.  
min.  
2500  
max.  
—
—
2200 pF  
10 pF  
min.  
—
—
3000  
max.  
—
—
1200 pF  
—
min.  
—
—
4000  
max.  
—
—
—
—
—
—
—
—
—
—
—
6800 pF  
100 pF  
3300 pF  
min.  
—
—
—
—
5000  
max.  
—
—
—
—
—
—
40  
Packaging of Chip Components  
Automatic Insertion Packaging  
TAPE & REEL QUANTITIES  
All tape and reel specifications are in compliance with RS481.  
8mm  
12mm  
Paper or Embossed Carrier  
Embossed Only  
0612, 0508, 0805, 1206,  
1210  
1812, 1825  
2220, 2225  
0306  
1808  
Paper Only  
0201, 0402, 0603  
Qty. per Reel/7" Reel  
2,000, 3,000 or 4,000, 10,000, 15,000  
Contact factory for exact quantity  
3,000  
500, 1,000  
Contact factory for exact quantity  
Qty. per Reel/13" Reel  
5,000, 10,000, 50,000  
Contact factory for exact quantity  
10,000  
4,000  
REEL DIMENSIONS  
Tape  
A
Max.  
B*  
Min.  
D*  
Min.  
N
Min.  
W2  
Max.  
C
W1  
W3  
Size(1)  
7.90 Min.  
(0.311)  
8.40 +-01..05  
14.4  
8mm  
(0.331 -+00..0059  
)
)
(0.567)  
10.9 Max.  
(0.429)  
330  
(12.992)  
1.5  
(0.059)  
13.0 -+00..2500  
20.2  
(0.795)  
50.0  
(1.969)  
(0.512+-00..000280  
)
11.9 Min.  
(0.469)  
15.4 Max.  
(0.607)  
12.4 -+02..00  
18.4  
(0.724)  
12mm  
(0.488 +-00..0079  
Metric dimensions will govern.  
English measurements rounded and for reference only.  
(1) For tape sizes 16mm and 24mm (used with chip size 3640) consult EIA RS-481 latest revision.  
47  
Embossed Carrier Configuration  
8 & 12mm Tape Only  
10 PITCHES CUMULATIVE  
TOLERANCE ON TAPE  
0.2mm ( 0.008)  
EMBOSSMENT  
P0  
T2  
T
D0  
P2  
DEFORMATION  
BETWEEN  
EMBOSSMENTS  
E1  
A0  
W
F
E2  
TOP COVER  
TAPE  
B1  
B0  
P1  
K0  
T1  
D1 FOR COMPONENTS  
2.00 mm x 1.20 mm AND  
LARGER (0.079 x 0.047)  
CENTER LINES  
OF CAVITY  
S1  
MAX. CAVITY  
SIZE - SEE NOTE 1  
B1 IS FOR TAPE READER REFERENCE ONLY  
INCLUDING DRAFT CONCENTRIC AROUND B0  
User Direction of Feed  
8 & 12mm Embossed Tape  
Metric Dimensions Will Govern  
CONSTANT DIMENSIONS  
Tape Size  
D0  
E
P0  
P2  
S1 Min.  
T Max.  
T1  
8mm  
and  
12mm  
1.50 -+00..010  
1.75 0.10  
4.0 0.10  
2.0 0.05  
0.60  
(0.024)  
0.60  
(0.024)  
0.10  
(0.004)  
Max.  
(0.059 +-00..0004  
)
(0.069 0.004) (0.157 0.004) (0.079 0.002)  
VARIABLE DIMENSIONS  
Tape Size  
B1  
Max.  
D1  
Min.  
E2  
Min.  
F
P1  
R
T2  
W
Max.  
A0 B0 K0  
Min.  
See Note 5 See Note 2  
4.35  
1.00  
6.25  
3.50 0.05  
4.00 0.10  
25.0  
2.50 Max.  
(0.098)  
8.30  
8mm  
See Note 1  
See Note 1  
See Note 1  
See Note 1  
(0.171)  
(0.039)  
(0.246) (0.138 0.002) (0.157 0.004)  
(0.984)  
(0.327)  
8.20  
(0.323)  
1.50  
(0.059)  
10.25  
5.50 0.05  
4.00 0.10  
30.0  
(1.181)  
6.50 Max.  
(0.256)  
12.3  
(0.484)  
12mm  
(0.404) (0.217 0.002) (0.157 0.004)  
8mm  
1/2 Pitch  
4.35  
(0.171)  
1.00  
(0.039)  
6.25  
3.50 0.05  
2.00 0.10  
25.0  
(0.984)  
2.50 Max.  
(0.098)  
8.30  
(0.327)  
(0.246) (0.138 0.002) (0.079 0.004)  
12mm  
Double  
Pitch  
8.20  
(0.323)  
1.50  
(0.059)  
10.25  
5.50 0.05  
8.00 0.10  
30.0  
(1.181)  
6.50 Max.  
(0.256)  
12.3  
(0.484)  
(0.404) (0.217 0.002) (0.315 0.004)  
NOTES:  
2. Tape with or without components shall pass around radius “R” without damage.  
1. The cavity defined by A0, B0, and K0 shall be configured to provide the following:  
Surround the component with sufficient clearance such that:  
3. Bar code labeling (if required) shall be on the side of the reel opposite the round sprocket holes.  
Refer to EIA-556.  
a) the component does not protrude beyond the sealing plane of the cover tape.  
b) the component can be removed from the cavity in a vertical direction without mechanical  
restriction, after the cover tape has been removed.  
4. B1 dimension is a reference dimension for tape feeder clearance only.  
5. If P1 = 2.0mm, the tape may not properly index in all tape feeders.  
c) rotation of the component is limited to 20º maximum (see Sketches D & E).  
d) lateral movement of the component is restricted to 0.5mm maximum (see Sketch F).  
Top View, Sketch "F"  
Component Lateral Movements  
0.50mm (0.020)  
Maximum  
0.50mm (0.020)  
Maximum  
48  
Paper Carrier Configuration  
8 & 12mm Tape Only  
10 PITCHES CUMULATIVE  
TOLERANCE ON TAPE  
0.20mm ( 0.008)  
P0  
D0  
P2  
T
E1  
BOTTOM  
COVER  
TAPE  
TOP  
COVER  
TAPE  
F
W
E2  
B0  
G
T1  
T1  
A0  
P1  
CAVITY SIZE  
SEE NOTE 1  
CENTER LINES  
OF CAVITY  
User Direction of Feed  
8 & 12mm Paper Tape  
Metric Dimensions Will Govern  
CONSTANT DIMENSIONS  
Tape Size  
D0  
E
P0  
P2  
T1  
G. Min.  
R Min.  
1.50 +-00..010  
8mm  
and  
12mm  
1.75 0.10  
4.00 0.10  
2.00 0.05  
0.10  
(0.004)  
Max.  
0.75  
(0.030)  
Min.  
25.0 (0.984)  
See Note 2  
Min.  
(0.059 -+00..0004  
)
(0.069 0.004) (0.157 0.004) (0.079 0.002)  
VARIABLE DIMENSIONS  
P1  
Tape Size  
E2 Min.  
F
W
A0 B0  
See Note 1  
T
See Note 4  
8mm  
4.00 0.10  
(0.157 0.004)  
6.25  
(0.246)  
3.50 0.05  
(0.138 0.002)  
8.00 -+00..1300  
(0.315 +-00..000142  
)
1.10mm  
(0.043) Max.  
for Paper Base  
Tape and  
4.00 0.010  
(0.157 0.004)  
10.25  
(0.404)  
5.50 0.05  
(0.217 0.002) (0.472 0.012)  
12.0 0.30  
12mm  
1.60mm  
(0.063) Max.  
for Non-Paper  
Base Compositions  
8mm  
1/2 Pitch  
2.00 0.05  
(0.079 0.002)  
6.25  
(0.246)  
3.50 0.05  
(0.138 0.002)  
8.00 +-00..1300  
(0.315 +-00..000142  
)
12mm  
Double  
Pitch  
8.00 0.10  
(0.315 0.004)  
10.25  
(0.404)  
5.50 0.05  
12.0 0.30  
(0.217 0.002) (0.472 0.012)  
NOTES:  
2. Tape with or without components shall pass around radius “R” without damage.  
1. The cavity defined by A0, B0, and T shall be configured to provide sufficient clearance  
surrounding the component so that:  
3. Bar code labeling (if required) shall be on the side of the reel opposite the sprocket  
holes. Refer to EIA-556.  
a) the component does not protrude beyond either surface of the carrier tape%  
b) the component can be removed from the cavity in a vertical direction without  
mechanical restriction after the top cover tape has been removed%  
c) rotation of the component is limited to 20º maximum (see Sketches A & B)%  
d) lateral movement of the component is restricted to 0.5mm maximum  
(see Sketch C).  
4. If P1 = 2.0mm, the tape may not properly index in all tape feeders.  
Top View, Sketch "C"  
Component Lateral  
0.50mm (0.020)  
Maximum  
0.50mm (0.020)  
Maximum  
Bar Code Labeling Standard  
AVX bar code labeling is available and follows latest version of EIA-556  
49  
Bulk Case Packaging  
BENEFITS  
BULK FEEDER  
• Easier handling  
• Smaller packaging volume  
(1/20 of T/R packaging)  
• Easier inventory control  
• Flexibility  
Case  
Cassette  
• Recyclable  
Gate  
Shooter  
CASE DIMENSIONS  
Shutter  
Slider  
12mm  
36mm  
Mounter  
Head  
Expanded Drawing  
110mm  
Chips  
Attachment Base  
CASE QUANTITIES  
Part Size  
0402  
0603  
0805  
1206  
Qty.  
(pcs / cassette)  
10,000 (T=.023")  
8,000 (T=.031")  
6,000 (T=.043")  
5,000 (T=.023")  
4,000 (T=.032")  
3,000 (T=.044")  
80,000  
15,000  
50  
Basic Capacitor Formulas  
I. Capacitance (farads)  
XI. Equivalent Series Resistance (ohms)  
.224 K A  
E.S.R. = (D.F.) (Xc) = (D.F.) / (2 π fC)  
English: C =  
TD  
XII. Power Loss (watts)  
.0884 K A  
Power Loss = (2 π fCV2) (D.F.)  
Metric: C =  
TD  
XIII. KVA (Kilowatts)  
II. Energy stored in capacitors (Joules, watt - sec)  
KVA = 2 π fCV2 x 10-3  
1
E = ⁄  
2
CV2  
XIV. Temperature Characteristic (ppm/°C)  
III. Linear charge of a capacitor (Amperes)  
Ct – C25  
C25 (Tt – 25)  
dV  
dt  
T.C. =  
x 106  
I = C  
XV. Cap Drift (%)  
C1 – C2  
C1  
IV. Total Impedance of a capacitor (ohms)  
2
RS + (X - X )2  
Z =ꢀ  
C.D. =  
x 100  
C
L
V. Capacitive Reactance (ohms)  
XVI. Reliability of Ceramic Capacitors  
1
x =  
c
L0  
Lt  
Vt  
Vo  
X
Tt  
To  
Y
=
2 π fC  
( ) ( )  
VI. Inductive Reactance (ohms)  
XVII. Capacitors in Series (current the same)  
xL = 2 π fL  
Any Number:  
1
C
1
1
C2  
1
---  
=
+
VII. Phase Angles:  
C1  
C
N
T
Ideal Capacitors: Current leads voltage 90°  
Ideal Inductors: Current lags voltage 90°  
Ideal Resistors: Current in phase with voltage  
C1 C2  
C1 + C2  
Two: C =  
T
XVIII. Capacitors in Parallel (voltage the same)  
VIII. Dissipation Factor (%)  
C = C1 + C2 --- + C  
T
N
E.S.R.  
D.F.= tan ꢀ (loss angle) =  
= (2 πfC) (E.S.R.)  
X
XIX. Aging Rate  
c
IX. Power Factor (%)  
A.R. = ꢀD C/decade of time  
P.F. = Sine ꢀ (loss angle) = Cos (phase angle)  
P.F. = (when less than 10ꢀ) = DF  
f
XX. Decibels  
db = 20 log  
V1  
V2  
X. Quality Factor (dimensionless)  
1
D.F.  
Q = Cotan ꢀ (loss angle) =  
METRIC PREFIXES SYMBOLS  
-12  
K
A
TD  
V
t
= Dielectric Constant  
= Area  
f
= frequency  
= Inductance  
= Loss angle  
= Phase angle  
Lt  
= Test life  
Pico  
Nano  
Micro  
Milli  
Deci  
Deca  
Kilo  
Mega  
Giga  
Tera  
X 10  
X 10  
X 10  
X 10  
X 10  
X 10  
X 10  
X 10  
X 10  
X 10  
-9  
L
ꢀ
Vt  
Vo  
Tt  
= Test voltage  
-6  
-3  
= Dielectric thickness  
= Voltage  
= Operating voltage  
= Test temperature  
= Operating temperature  
-1  
+1  
+3  
+6  
+9  
+12  
f
= time  
X & Y = exponent effect of voltage and temp.  
To  
R
= Series Resistance  
Lo  
= Operating life  
s
51  
General Description  
Basic Construction – A multilayer ceramic (MLC) capaci-  
tor is a monolithic block of ceramic containing two sets of  
offset, interleaved planar electrodes that extend to two  
opposite surfaces of the ceramic dielectric. This simple  
structure requires a considerable amount of sophistication,  
both in material and manufacture, to produce it in the quality  
and quantities needed in today’s electronic equipment.  
Electrode  
Ceramic Layer  
End Terminations  
Terminated  
Edge  
Terminated  
Edge  
Margin  
Electrodes  
Multilayer Ceramic Capacitor  
Figure 1  
Formulations – Multilayer ceramic capacitors are available  
in both Class 1 and Class 2 formulations. Temperature  
compensating formulation are Class 1 and temperature  
stable and general application formulations are classified  
as Class 2.  
Class 2 – EIA Class 2 capacitors typically are based on the  
chemistry of barium titanate and provide a wide range of  
capacitance values and temperature stability. The most  
commonly used Class 2 dielectrics are X7R and Y5V. The  
X7R provides intermediate capacitance values which vary  
only 15ꢀ over the temperature range of -55°C to 125°C. It  
finds applications where stability over a wide temperature  
range is required.  
Class 1 – Class 1 capacitors or temperature compensating  
capacitors are usually made from mixtures of titanates  
where barium titanate is normally not a major part of the  
mix. They have predictable temperature coefficients and  
in general, do not have an aging characteristic. Thus they  
are the most stable capacitor available. The most popular  
Class 1 multilayer ceramic capacitors are C0G (NP0)  
temperature compensating capacitors (negative-positive  
0 ppm/°C).  
The Y5V provides the highest capacitance values and is  
used in applications where limited temperature changes are  
expected. The capacitance value for Y5V can vary from  
22ꢀ to -82ꢀ over the -30°C to 85°C temperature range.  
The Z5U dielectric is between X7R and Y5V in both stability  
and capacitance range.  
All Class 2 capacitors vary in capacitance value under the  
influence of temperature, operating voltage (both AC and  
DC), and frequency. For additional information on perfor-  
mance changes with operating conditions, consult AVX’s  
software, SpiCap.  
52  
General Description  
Effects of Voltage – Variations in voltage have little effect  
on Class 1 dielectric but does affect the capacitance and  
dissipation factor of Class 2 dielectrics. The application of  
DC voltage reduces both the capacitance and dissipation  
factor while the application of an AC voltage within a  
reasonable range tends to increase both capacitance and  
dissipation factor readings. If a high enough AC voltage is  
applied, eventually it will reduce capacitance just as a DC  
voltage will. Figure 2 shows the effects of AC voltage.  
Table 1: EIA and MIL Temperature Stable and General  
Application Codes  
EIA CODE  
Percent Capacity Change Over Temperature Range  
RS198  
Temperature Range  
X7  
X5  
Y5  
Z5  
-55°C to +125°C  
-55°C to +85°C  
-30°C to +85°C  
+10°C to +85°C  
Cap. Change vs. A.C. Volts  
X7R  
Code  
Percent Capacity Change  
50  
40  
30  
20  
D
E
F
P
R
S
T
3.3%  
4.7%  
7.5%  
10%  
15%  
22%  
+22%, -33%  
+22%, - 56%  
+22%, -82%  
10  
0
U
V
EXAMPLE – A capacitor is desired with the capacitance value at 25°C  
to increase no more than 7.5% or decrease no more than 7.5% from  
-30°C to +85°C. EIA Code will be Y5F.  
12.5  
25  
37.5  
50  
Volts AC at 1.0 KHz  
Figure 2  
MIL CODE  
Capacitor specifications specify the AC voltage at which to  
measure (normally 0.5 or 1 VAC) and application of the  
wrong voltage can cause spurious readings. Figure 3 gives  
the voltage coefficient of dissipation factor for various AC  
voltages at 1 kilohertz. Applications of different frequencies  
will affect the percentage changes versus voltages.  
Symbol  
Temperature Range  
A
B
C
-55°C to +85°C  
-55°C to +125°C  
-55°C to +150°C  
D.F. vs. A.C. Measurement Volts  
X7R  
Cap. Change  
Zero Volts  
Cap. Change  
Rated Volts  
Symbol  
10.0  
R
W
X
+15%, -15%  
+22%, -56%  
+15%, -15%  
+30%, -70%  
+20%, -20%  
+15%, -40%  
+22%, -66%  
+15%, -25%  
+30%, -80%  
+20%, -30%  
Curve 1 - 100 VDC Rated Capacitor  
Curve 2 - 50 VDC Rated Capacitor  
Curve 3 - 25 VDC Rated Capacitor  
Curve 3  
Curve 2  
8.0  
Y
6.0  
4.0  
Z
Temperature characteristic is specified by combining range and  
change symbols, for example BR or AW. Specification slash sheets  
indicate the characteristic applicable to a given style of capacitor.  
Curve 1  
2.0  
0
.5  
1.0  
1.5  
2.0  
2.5  
In specifying capacitance change with temperature for Class  
2 materials, EIA expresses the capacitance change over an  
operating temperature range by a 3 symbol code. The first  
symbol represents the cold temperature end of the temper-  
ature range, the second represents the upper limit of the  
operating temperature range and the third symbol repre-  
sents the capacitance change allowed over the  
operating temperature range. Table 1 provides a detailed  
explanation of the EIA system.  
AC Measurement Volts at 1.0 KHz  
Figure 3  
Typical effect of the application of DC voltage is shown in  
Figure 4. The voltage coefficient is more pronounced for  
higher K dielectrics. These figures are shown for room tem-  
perature conditions. The combination characteristic known  
as voltage temperature limits which shows the effects of  
rated voltage over the operating temperature range is  
shown in Figure 5 for the military BX characteristic.  
53  
General Description  
tends to de-age capacitors and is why re-reading of capaci-  
tance after 12 or 24 hours is allowed in military specifica-  
tions after dielectric strength tests have been performed.  
Typical Cap. Change vs. D.C. Volts  
X7R  
2.5  
0
Typical Curve of Aging Rate  
X7R  
+1.5  
0
-2.5  
-5  
-7.5  
-10  
-1.5  
25%  
50%  
Percent Rated Volts  
Figure 4  
75%  
100%  
-3.0  
-4.5  
Typical Cap. Change vs. Temperature  
X7R  
-6.0  
-7.5  
+20  
+10  
0
1
10  
100 1000 10,000 100,000  
Hours  
0VDC  
Characteristic Max. Aging Rate %/Decade  
None  
2
7
C0G (NP0)  
X7R, X5R  
Y5V  
-10  
-20  
-30  
Figure 6  
Effects of Frequency – Frequency affects capacitance  
and impedance characteristics of capacitors. This effect is  
much more pronounced in high dielectric constant ceramic  
formulation that is low K formulations. AVX’s SpiCap soft-  
ware generates impedance, ESR, series inductance, series  
resonant frequency and capacitance all as functions of  
frequency, temperature and DC bias for standard chip sizes  
and styles. It is available free from AVX and can be down-  
loaded for free from AVX website: www.avxcorp.com.  
-55 -35 -15 +5 +25 +45 +65 +85 +105 +125  
Temperature Degrees Centigrade  
Figure 5  
Effects of Time – Class 2 ceramic capacitors change  
capacitance and dissipation factor with time as well as tem-  
perature, voltage and frequency. This change with time is  
known as aging. Aging is caused by a gradual re-alignment  
of the crystalline structure of the ceramic and produces an  
exponential loss in capacitance and decrease in dissipation  
factor versus time. A typical curve of aging rate for semi-  
stable ceramics is shown in Figure 6.  
If a Class 2 ceramic capacitor that has been sitting on the  
shelf for a period of time, is heated above its curie point,  
1
(125°C for 4 hours or 150°C for ⁄  
2
hour will suffice) the part  
will de-age and return to its initial capacitance and dissi-  
pation factor readings. Because the capacitance changes  
rapidly, immediately after de-aging, the basic capacitance  
measurements are normally referred to a time period some-  
time after the de-aging process. Various manufacturers use  
different time bases but the most popular one is one day  
or twenty-four hours after “last heat.” Change in the aging  
curve can be caused by the application of voltage and  
other stresses. The possible changes in capacitance due to  
de-aging by heating the unit explain why capacitance  
changes are allowed after test, such as temperature cycling,  
moisture resistance, etc., in MIL specs. The application of  
high voltages such as dielectric withstanding voltages also  
54  
General Description  
Effects of Mechanical Stress – High “K” dielectric  
ceramic capacitors exhibit some low level piezoelectric  
reactions under mechanical stress. As a general statement,  
the piezoelectric output is higher, the higher the dielectric  
constant of the ceramic. It is desirable to investigate this  
effect before using high “K” dielectrics as coupling capaci-  
tors in extremely low level applications.  
Energy Stored – The energy which can be stored in a  
capacitor is given by the formula:  
E = 1⁄ CV2  
2
E = energy in joules (watts-sec)  
V = applied voltage  
C = capacitance in farads  
Reliability – Historically ceramic capacitors have been one  
of the most reliable types of capacitors in use today.  
The approximate formula for the reliability of a ceramic  
capacitor is:  
Potential Change – A capacitor is a reactive component  
which reacts against a change in potential across it. This is  
shown by the equation for the linear charge of a capacitor:  
Lo  
Lt  
Vt  
X
Tt  
Y
=
ꢁ ꢁ  
ꢁV ꢁ  
T
o
o
dV  
dt  
Iideal  
=
C
where  
Lo = operating life  
Lt = test life  
Vt = test voltage  
Tt = test temperature and  
To = operating temperature  
in °C  
where  
I = Current  
C = Capacitance  
Vo = operating voltage  
X,Y = see text  
dV/dt = Slope of voltage transition across capacitor  
Thus an infinite current would be required to instantly  
change the potential across a capacitor. The amount of  
current a capacitor can “sink” is determined by the above  
equation.  
Historically for ceramic capacitors exponent X has been  
considered as 3. The exponent Y for temperature effects  
typically tends to run about 8.  
Equivalent Circuit – A capacitor, as a practical device,  
exhibits not only capacitance but also resistance and  
inductance. A simplified schematic for the equivalent circuit  
is:  
A capacitor is a component which is capable of storing  
electrical energy. It consists of two conductive plates (elec-  
trodes) separated by insulating material which is called the  
dielectric. A typical formula for determining capacitance is:  
C = Capacitance  
L = Inductance  
Rs = Series Resistance  
Rp = Parallel Resistance  
.224 KA  
C =  
t
RP  
C = capacitance (picofarads)  
K = dielectric constant (Vacuum = 1)  
A = area in square inches  
t = separation between the plates in inches  
(thickness of dielectric)  
L
R S  
.224 = conversion constant  
C
(.0884 for metric system in cm)  
Reactance – Since the insulation resistance (Rp) is normal-  
Capacitance – The standard unit of capacitance is the  
farad. A capacitor has a capacitance of 1 farad when 1  
coulomb charges it to 1 volt. One farad is a very large unit  
ly very high, the total impedance of a capacitor is:  
2
2
Z = RS + (XC - XL)  
-6  
and most capacitors have values in the micro (10 ), nano  
ꢀ
where  
-9  
-12  
(10 ) or pico (10 ) farad level.  
Z = Total Impedance  
Dielectric Constant – In the formula for capacitance given  
above the dielectric constant of a vacuum is arbitrarily cho-  
sen as the number 1. Dielectric constants of other materials  
are then compared to the dielectric constant of a vacuum.  
Rs = Series Resistance  
XC = Capacitive Reactance =  
1
2 π fC  
XL = Inductive Reactance = 2 π fL  
Dielectric Thickness – Capacitance is indirectly propor-  
tional to the separation between electrodes. Lower voltage  
requirements mean thinner dielectrics and greater capaci-  
tance per volume.  
The variation of a capacitor’s impedance with frequency  
determines its effectiveness in many applications.  
Phase Angle – Power Factor and Dissipation Factor are  
often confused since they are both measures of the loss in  
a capacitor under AC application and are often almost  
identical in value. In a “perfect” capacitor the current in the  
capacitor will lead the voltage by 90°.  
Area – Capacitance is directly proportional to the area of  
the electrodes. Since the other variables in the equation are  
usually set by the performance desired, area is the easiest  
parameter to modify to obtain a specific capacitance within  
a material group.  
55  
General Description  
di  
dt  
The  
seen in current microprocessors can be as high as  
I (Ideal)  
0.3 A/ns, and up to 10A/ns. At 0.3 A/ns, 100pH of parasitic  
inductance can cause a voltage spike of 30mV. While this  
does not sound very drastic, with the Vcc for microproces-  
sors decreasing at the current rate, this can be a fairly large  
percentage.  
I (Actual)  
Loss  
Angle  
Phase  
Angle  
ꢀ
Another important, often overlooked, reason for knowing  
the parasitic inductance is the calculation of the resonant  
frequency. This can be important for high frequency, by-  
pass capacitors, as the resonant point will give the most  
signal attenuation. The resonant frequency is calculated  
from the simple equation:  
f
V
IRs  
In practice the current leads the voltage by some other  
phase angle due to the series resistance RS. The comple-  
ment of this angle is called the loss angle and:  
fres =  
1
2ꢁꢀLC  
Insulation Resistance – Insulation Resistance is the  
resistance measured across the terminals of a capacitor  
and consists principally of the parallel resistance RP shown  
in the equivalent circuit. As capacitance values and hence  
the area of dielectric increases, the I.R. decreases and  
hence the product (C x IR or RC) is often specified in ohm  
faradsor more commonly megohm-microfarads. Leakage  
current is determined by dividing the rated voltage by IR  
(Ohm’s Law).  
Power Factor (P.F.) = Cos f or Sine ꢀ  
Dissipation Factor (D.F.) = tan ꢀ  
for small values of ꢀ the tan and sine are essentially equal  
which has led to the common interchangeability of the two  
terms in the industry.  
Equivalent Series Resistance – The term E.S.R. or  
Equivalent Series Resistance combines all losses both  
series and parallel in a capacitor at a given frequency so  
that the equivalent circuit is reduced to a simple R-C series  
connection.  
Dielectric Strength – Dielectric Strength is an expression  
of the ability of a material to withstand an electrical stress.  
Although dielectric strength is ordinarily expressed in volts, it  
is actually dependent on the thickness of the dielectric and  
thus is also more generically a function of volts/mil.  
Dielectric Absorption – A capacitor does not discharge  
instantaneously upon application of a short circuit, but  
drains gradually after the capacitance proper has been dis-  
charged. It is common practice to measure the dielectric  
absorption by determining the “reappearing voltage” which  
appears across a capacitor at some point in time after it has  
been fully discharged under short circuit conditions.  
E.S.R.  
C
Dissipation Factor – The DF/PF of a capacitor tells what  
percent of the apparent power input will turn to heat in the  
capacitor.  
Corona – Corona is the ionization of air or other vapors  
which causes them to conduct current. It is especially  
prevalent in high voltage units but can occur with low voltages  
as well where high voltage gradients occur. The energy  
discharged degrades the performance of the capacitor and  
can in time cause catastrophic failures.  
E.S.R.  
XC  
Dissipation Factor =  
= (2 π fC) (E.S.R.)  
The watts loss are:  
Watts loss = (2 π fCV2) (D.F.)  
Very low values of dissipation factor are expressed as their  
reciprocal for convenience. These are called the “Q” or  
Quality factor of capacitors.  
Parasitic Inductance – The parasitic inductance of capac-  
itors is becoming more and more important in the decou-  
pling of today’s high speed digital systems. The relationship  
between the inductance and the ripple voltage induced on  
the DC voltage line can be seen from the simple inductance  
equation:  
di  
dt  
V = L  
56  
Surface Mounting Guide  
MLC Chip Capacitors  
REFLOW SOLDERING  
Case Size  
0402  
D1  
D2  
D3  
D4  
D5  
D2  
1.70 (0.07)  
2.30 (0.09)  
3.00 (0.12)  
4.00 (0.16)  
4.00 (0.16)  
5.60 (0.22)  
5.60 (0.22)  
5.60 (0.22)  
6.60 (0.26)  
6.60 (0.26)  
0.60 (0.02)  
0.80 (0.03)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04))  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
0.50 (0.02)  
0.70 (0.03)  
1.00 (0.04)  
2.00 (0.09)  
2.00 (0.09)  
3.60 (0.14)  
3.60 (0.14)  
3.60 (0.14)  
4.60 (0.18)  
4.60 (0.18)  
0.60 (0.02)  
0.80 (0.03)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
1.00 (0.04)  
0.50 (0.02)  
0.75 (0.03)  
1.25 (0.05)  
1.60 (0.06)  
2.50 (0.10)  
2.00 (0.08)  
3.00 (0.12)  
6.35 (0.25)  
5.00 (0.20)  
6.35 (0.25)  
0603  
0805  
1206  
1210  
1808  
1812  
1825  
2220  
D1  
D3  
D4  
D5  
2225  
Dimensions in millimeters (inches)  
Component Pad Design  
Component pads should be designed to achieve good  
solder filets and minimize component movement during  
reflow soldering. Pad designs are given below for the most  
common sizes of multilayer ceramic capacitors for both  
wave and reflow soldering. The basis of these designs is:  
• Pad width equal to component width. It is permissible to  
decrease this to as low as 85ꢀ of component width but it  
is not advisable to go below this.  
• Pad overlap 0.5mm beneath component.  
• Pad extension 0.5mm beyond components for reflow and  
1.0mm for wave soldering.  
WAVE SOLDERING  
D2  
Case Size  
0603  
D1  
D2  
D3  
D4  
D5  
3.10 (0.12)  
4.00 (0.15)  
5.00 (0.19)  
5.00 (0.19)  
1.20 (0.05)  
1.50 (0.06)  
1.50 (0.06)  
1.50 (0.06)  
0.70 (0.03)  
1.00 (0.04)  
2.00 (0.09)  
2.00 (0.09)  
1.20 (0.05)  
1.50 (0.06)  
1.50 (0.06)  
1.50 (0.06)  
0.75 (0.03)  
1.25 (0.05)  
1.60 (0.06)  
2.50 (0.10)  
D1  
D3  
D4  
0805  
1206  
1210  
D5  
Dimensions in millimeters (inches)  
Component Spacing  
Preheat & Soldering  
For wave soldering components, must be spaced sufficiently  
far apart to avoid bridging or shadowing (inability of solder  
to penetrate properly into small spaces). This is less impor-  
tant for reflow soldering but sufficient space must be  
allowed to enable rework should it be required.  
The rate of preheat should not exceed 4°C/second to  
prevent thermal shock. A better maximum figure is about  
2°C/second.  
For capacitors size 1206 and below, with a maximum  
thickness of 1.25mm, it is generally permissible to allow a  
temperature differential from preheat to soldering of 150°C.  
In all other cases this differential should not exceed 100°C.  
For further specific application or process advice, please  
consult AVX.  
Cleaning  
≥1.5mm (0.06)  
≥1mm (0.04)  
Care should be taken to ensure that the capacitors are  
thoroughly cleaned of flux residues especially the space  
beneath the capacitor. Such residues may otherwise  
become conductive and effectively offer a low resistance  
bypass to the capacitor.  
≥1mm (0.04)  
Ultrasonic cleaning is permissible, the recommended  
conditions being 8 Watts/litre at 20-45 kHz, with a process  
cycle of 2 minutes vapor rinse, 2 minutes immersion in the  
ultrasonic solvent bath and finally 2 minutes vapor rinse.  
57  
Surface Mounting Guide  
MLC Chip Capacitors  
General  
APPLICATION NOTES  
Surface mounting chip multilayer ceramic capacitors  
are designed for soldering to printed circuit boards or other  
substrates. The construction of the components is such that  
they will withstand the time/temperature profiles used in both  
wave and reflow soldering methods.  
Storage  
Good solderability is maintained for at least twelve months,  
provided the components are stored in their “as received”  
packaging at less than 40°C and 70ꢀ RH.  
Solderability  
Handling  
Terminations to be well soldered after immersion in a 60/40  
tin/lead solder bath at 235 5°C for 2 1 seconds.  
Chip multilayer ceramic capacitors should be handled with  
care to avoid damage or contamination from perspiration  
and skin oils. The use of tweezers or vacuum pick ups  
is strongly recommended for individual components. Bulk  
handling should ensure that abrasion and mechanical shock  
are minimized. Taped and reeled components provides the  
ideal medium for direct presentation to the placement  
machine. Any mechanical shock should be minimized during  
handling chip multilayer ceramic capacitors.  
Leaching  
Terminations will resist leaching for at least the immersion  
times and conditions shown below.  
Solder  
Tin/Lead/Silver Temp. °C  
60/40/0 260  
Solder  
Immersion Time  
Seconds  
Termination Type  
Nickel Barrier  
5
30  
1
Preheat  
It is important to avoid the possibility of thermal shock during  
soldering and carefully controlled preheat is therefore  
required. The rate of preheat should not exceed 4°C/second  
and a target figure 2°C/second is recommended. Although  
an 80°C to 120°C temperature differential is preferred,  
recent developments allow a temperature differential  
between the component surface and the soldering temper-  
ature of 150°C (Maximum) for capacitors of 1210 size and  
below with a maximum thickness of 1.25mm. The user is  
cautioned that the risk of thermal shock increases as chip  
size or temperature differential increases.  
Recommended Soldering Profiles  
Reflow  
300  
Natural  
Cooling  
Preheat  
250  
200  
220°C  
to  
250°C  
150  
100  
50  
Soldering  
Mildly activated rosin fluxes are preferred. The minimum  
amount of solder to give a good joint should be used.  
Excessive solder can lead to damage from the stresses  
caused by the difference in coefficients of expansion  
between solder, chip and substrate. AVX terminations are  
suitable for all wave and reflow soldering systems. If hand  
soldering cannot be avoided, the preferred technique is the  
utilization of hot air soldering tools.  
0
1min  
(Minimize soldering time)  
10 sec. max  
1min  
Wave  
Cooling  
Natural cooling in air is preferred, as this minimizes stresses  
within the soldered joint. When forced air cooling is used,  
cooling rate should not exceed 4°C/second. Quenching  
is not recommended but if used, maximum temperature  
differentials should be observed according to the preheat  
conditions above.  
300  
Preheat  
Natural  
Cooling  
250  
200  
150  
100  
50  
T
230°C  
to  
Cleaning  
250°C  
Flux residues may be hygroscopic or acidic and must be  
removed. AVX MLC capacitors are acceptable for use with  
all of the solvents described in the specifications MIL-STD-  
202 and EIA-RS-198. Alcohol based solvents are acceptable  
and properly controlled water cleaning systems are also  
acceptable. Many other solvents have been proven successful,  
and most solvents that are acceptable to other components  
on circuit assemblies are equally acceptable for use with  
ceramic capacitors.  
0
1 to 2 min  
3 sec. max  
(Preheat chips before soldering)  
T/maximum 150°C  
58  
Surface Mounting Guide  
MLC Chip Capacitors  
POST SOLDER HANDLING  
COMMON CAUSES OF  
Once SMP components are soldered to the board, any  
bending or flexure of the PCB applies stresses to the sol-  
dered joints of the components. For leaded devices, the  
stresses are absorbed by the compliancy of the metal leads  
and generally don’t result in problems unless the stress is  
large enough to fracture the soldered connection.  
MECHANICAL CRACKING  
The most common source for mechanical stress is board  
depanelization equipment, such as manual breakapart, v-  
cutters and shear presses. Improperly aligned or dull cutters  
may cause torqueing of the PCB resulting in flex stresses  
being transmitted to components near the board edge.  
Another common source of flexural stress is contact during  
parametric testing when test points are probed. If the PCB  
is allowed to flex during the test cycle, nearby ceramic  
capacitors may be broken.  
Ceramic capacitors are more susceptible to such stress  
because they don’t have compliant leads and are brittle in  
nature. The most frequent failure mode is low DC resistance  
or short circuit. The second failure mode is significant loss  
of capacitance due to severing of contact between sets of  
the internal electrodes.  
A third common source is board to board connections at  
vertical connectors where cables or other PCBs are con-  
nected to the PCB. If the board is not supported during the  
plug/unplug cycle, it may flex and cause damage to nearby  
components.  
Cracks caused by mechanical flexure are very easily identi-  
fied and generally take one of the following two general  
forms:  
Special care should also be taken when handling large (>6"  
on a side) PCBs since they more easily flex or warp than  
smaller boards.  
REWORKING OF MLCs  
Thermal shock is common in MLCs that are manually  
attached or reworked with a soldering iron. AVX strongly  
recommends that any reworking of MLCs be done with hot  
air reflow rather than soldering irons. It is practically impossi-  
ble to cause any thermal shock in ceramic capacitors when  
using hot air reflow.  
Type A:  
Angled crack between bottom of device to top of solder joint.  
However direct contact by the soldering iron tip often caus-  
es thermal cracks that may fail at a later date. If rework by  
soldering iron is absolutely necessary, it is recommended  
that the wattage of the iron be less than 30 watts and the  
tip temperature be <300ºC. Rework should be performed  
by applying the solder iron tip to the pad and not directly  
contacting any part of the ceramic capacitor.  
Type B:  
Fracture from top of device to bottom of device.  
Mechanical cracks are often hidden underneath the termi-  
nation and are difficult to see externally. However, if one end  
termination falls off during the removal process from PCB,  
this is one indication that the cause of failure was excessive  
mechanical stress due to board warping.  
59  
Surface Mounting Guide  
MLC Chip Capacitors  
Solder Tip  
Solder Tip  
Preferred Method - No Direct Part Contact  
Poor Method - Direct Contact with Part  
PCB BOARD DESIGN  
To avoid many of the handling problems, AVX recommends that MLCs be located at least .2" away from nearest edge of  
board. However when this is not possible, AVX recommends that the panel be routed along the cut line, adjacent to where the  
MLC is located.  
No Stress Relief for MLCs  
Routed Cut Line Relieves Stress on MLC  
60  

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VISHAY

SI9122E

 500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

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VISHAY
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